Key based pin sharing selection

Details Key based pin sharing selection Key based pin sharing selection

2011-04-12

2011-04-12

Barnie, Rexford N (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S093000, C326S062000

Reexamination Certificate

active

07924050

ABSTRACT:
This invention is an integrated circuit having at least one data pin connecting to external circuits. The invention plural operational units each having a normal mode and a stall mode controlled by an enable input. Selection logic selectively enables an operation unit and connects the data input/output of the enabled operation unit to the data pin. The operational units are responsive to a preceding or following key to enter the normal mode. Each operational unit switches between stall mode and the normal mode upon receiving a corresponding predetermined selection number of pulses at while the clock input receives a non-cycling signal. Greater number of pulses deselect all operational units, switch operational units to the normal mode if the correct key is received and switch all operational units to the stall mode.

REFERENCES:
patent: 5107230 (1992-04-01), King
patent: 5500611 (1996-03-01), Popat et al.
patent: 6825687 (2004-11-01), Keshavarzi et al.
patent: 2004/0122541 (2004-06-01), DiSanza et al.

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