Junction-isolated depletion mode ferroelectric memory devices

Details Junction-isolated depletion mode ferroelectric memory devices Junction-isolated depletion mode ferroelectric memory devices

2005-06-07

2005-06-07

Elms, Richard (Department: 2824)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S185010, C365S185260, C257S295000, C257S270000, C257S290000

Reexamination Certificate

active

06903960

ABSTRACT:
Depletion-mode ferroelectric transistors are adapted for use as non-volatile memory cells. Various embodiments are described having a diode interposed between the bit line and a source/drain region of the transistor for added margin against read disturb. Various additional embodiments are described having an array architecture such that two memory cells sharing the same bit line also share the same program line. Using this configuration, non-selected cells are readily supplied with gate/source voltages sufficient to maintain the cells in a deactivated state during read and write operations on selected cells.

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