Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2005-12-13
2005-12-13
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S106000, C438S107000, C438S108000
Reexamination Certificate
active
06974722
ABSTRACT:
A jogging structure for translating wiring connections from points in a first grid to corresponding points in a second grid in a chip carrier module is disclosed. In an exemplary embodiment, the structure includes a first translation layer, coupled to the first grid, the first translation layer translating the first grid in an x-axis direction. A second translation layer is coupled to the first translation layer, the second translation layer for translating said wiring connections from the first grid in a y-axis direction, the y-axis direction being orthogonal to the x-axis direction. The second translation layer is further coupled to the second grid.
REFERENCES:
patent: 4245273 (1981-01-01), Feinberg et al.
patent: 4295149 (1981-10-01), Balyoz et al.
patent: 4713773 (1987-12-01), Cooper et al.
patent: 4782193 (1988-11-01), Linsker
patent: 4811082 (1989-03-01), Jacobs et al.
patent: 5060116 (1991-10-01), Grobman et al.
patent: 5074037 (1991-12-01), Sutcliffe et al.
patent: 5341310 (1994-08-01), Gould et al.
patent: 5488542 (1996-01-01), Ito
patent: 5544069 (1996-08-01), Mohsen
patent: 5657242 (1997-08-01), Sekiyama et al.
patent: 5866441 (1999-02-01), Pace
patent: 5914533 (1999-06-01), Frech et al.
patent: 5936843 (1999-08-01), Ohshima et al.
patent: 5973928 (1999-10-01), Blasi et al.
patent: 5998861 (1999-12-01), Hiruta
patent: 6072233 (2000-06-01), Corisis et al.
patent: 6161215 (2000-12-01), Hollenbeck et al.
patent: 6221693 (2001-04-01), Ho
patent: 6228468 (2001-05-01), Vodrahalli
patent: 6489181 (2002-12-01), Kado et al.
patent: 6528735 (2003-03-01), Bhatia et al.
patent: 6617243 (2003-09-01), Weekly
patent: 2004/0229396 (2004-11-01), Shi et al.
Daves Glenn G.
Frankel Jason
Shutler William F.
Sigler Anthony Wayne
Stoller Herbert I.
Cantor & Colburn LLP
Cioffi James
Lebentritt Michael
Pompey Ron
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