Jitter suppression circuit

Details Jitter suppression circuit Jitter suppression circuit

1995-10-19

1996-11-26

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375346, H04L 700

Patent

active

055793517

ABSTRACT:
A jitter suppression circuit for removing a jitter component contained in a synchronous reference clock signal which is supplied from a synchronization network to a phase locked loop circuit in a switching system, the phase locked loop circuit generating a clock signal in response to the synchronous reference clock signal from the synchronization network. The jitter suppression circuit removes the jitter component contained in the synchronous reference clock signal, to supply a pure synchronous reference clock signal to the phase locked loop circuit. Therefore, the phase locked loop circuit can output the clock signal at a stabilized state because it can control a phase of the clock signal with no effect of the jitter component.

REFERENCES:
patent: 4639939 (1987-01-01), Hirosaki et al.
patent: 5084902 (1992-01-01), Aotani et al.
patent: 5103185 (1992-04-01), Hrai
patent: 5128968 (1992-07-01), Yoshida
"Phase-Locked Loops", Edited by William C. Lindsey and Chak M. Chie, IEEE PRESS.

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