Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2005-10-25
2005-10-25
Phu, Phuong (Department: 2631)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S376000, C375S373000
Reexamination Certificate
active
06959060
ABSTRACT:
A jitter reducing apparatus using a digital modulation technique includes: an elastic store storing data flowed in from an SDH network; a pattern generator controlling a data read speed so the elastic store maintains a constant data storing amount; a modulation sequencer generating a digital signal wave having a constant period and amplitude; and a phase level detector controlling the pattern generator using the digital signal wave of the modulation sequencer.
REFERENCES:
patent: 4996698 (1991-02-01), Nelson
patent: 5311511 (1994-05-01), Reilly et al.
patent: 5835543 (1998-11-01), Mazzurco et al.
patent: 5974105 (1999-10-01), Wang et al.
patent: 6064706 (2000-05-01), Driskill et al.
patent: 6819727 (2004-11-01), Cucchi et al.
Fleshner & Kim LLP
LG Electronics Inc.
Phu Phuong
LandOfFree
Jitter reducing apparatus using digital modulation technique does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Jitter reducing apparatus using digital modulation technique, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Jitter reducing apparatus using digital modulation technique will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3450501