Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1986-10-21
1988-03-01
Chin, Tommy P.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358320, 358337, H04N 595, H04N 9475
Patent
active
047290250
ABSTRACT:
A jitter correction circuit is a circuit for suppressing a jitter contained in a reproduced digital signal. This jitter correction circuit comprises a phase-locked loop circuit comprising a phase comparing circuit (9), a second low-pass filter (10), a second voltage control oscillator (11) and a second frequency dividing circuit (12). The phase-locked loop circuit provides an oscillation output which causes little influence to a jitter component contained in a reproduced signal digitally converted by an analog-to-digital converting circuit (1). The digitally converted reproduced signal is resampled in a sampling pulse generating circuit (13) and a resampling circuit (7) which operates based on the above stated phase-locked loop circuit. As a result, the resampling circuit (7) provides an output having a considerably decreased amount of jitter.
REFERENCES:
patent: 4212027 (1980-07-01), Lemoine
patent: 4635097 (1987-01-01), Tatami
patent: 4646136 (1987-02-01), Kouyama
"High Definition Television Systems: Desirable Standards, Signal Forms, and Transmission Systems", by Takashi Fujio, IEEE Transactions on Communications, vol. Com-29, No. 12, Dec., 1981, pp. 1882-1891.
"Digital Technology in Broadcasting", pp. 163-167, issued by Nippon Hoso Shuppan Kyokai.
"Nikkei Electronics", issued by Nikkei McGraw-Hill, Mar. 12, 1984, pp. 112-116.
"New Transmission System of High-Quality Television", Jun. 6, 1984, from the meeting of NHK General Tech. Institute & NHK Broadcasting Scientific Basic Inst.
"Radio Wave Science", issued by Nippon Hoso Shuppan Kyokai, Apr. 1, 1984, pp. 103-108.
Chin Tommy P.
Sanyo Electric Co,. Ltd.
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