Approach to provide high external voltage for flash memory erase

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518518, 36518531, G11C 1604

Patent

active

06166961&

ABSTRACT:
In this invention external high voltages are connected to a chip containing a flash memory that are connected to selected cells to be erased. Internal pump circuits contained on the chip are turned off while the external voltages are used. The external voltages, a high negative voltage and a high positive voltage, are connected to gates and sources respectively of selected cells to be erased by a voltage control module. The external voltages are used during manufacture during program/erase operations to perform the erase function efficiently. The internal high voltage pump circuits are used to erase flash memory cells after being assembled on a circuit board by a user. Two level shifter circuits are disclosed that form a part of the voltage control module. The level shifter circuits apply voltages to the flash memory cells and provide voltages that select and deselect the cells for erasure.

REFERENCES:
patent: 5491656 (1996-02-01), Sawada
patent: 5668758 (1997-09-01), Yiu et al.
patent: 5781477 (1998-07-01), Rinerson et al.
patent: 5818758 (1998-10-01), Wojciechowski
patent: 5942808 (1999-08-01), Kaneko et al.
patent: 5991221 (1999-11-01), Ishikawa et al.

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