Fishing – trapping – and vermin destroying
Patent
1990-10-12
1991-10-29
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 41, 437 44, 437913, 437192, 357 239, 357 234, H01L 21265
Patent
active
050616471
ABSTRACT:
A semiconductor device and process wherein an ITLDD device (60) is formed having an inverse-T (IT) transistor gate with a variable work function (.PHI.) across the gate. The variable work function is attained by depositing a work function adjusting layer onto the thin gate extensions of the IT-gate. In accordance with one embodiment of the invention, a semiconductor substrate (10) of a first conductivity type is provided having a gate dielectric layer (12) formed thereon. First and second lightly doped regions (36, 37) of a second conductivity type are formed in the substrate which are spaced apart by a channel region (38). An IT-gate electrode (48) is formed on the gate dielectric layer overlying the first and second lightly doped regions and the channel region. The IT-gate has a relatively thick central section (32) and relatively thin lateral extensions (50) projecting from the central portion along the gate dielectric layer. A work function adjusting layer (46) overlies and is in intimate contact with at least the lateral extensions of the IT-gate. The presence of the work function adjusting layer changes the electrical characteristics of the extensions relative to the central section of the IT-gate. Heavily doped source and drain regions (52, 53) of the second conductivity type are formed in the substrate adjacent to the first and second lightly doped regions and aligned to the edge of the gate extensions.
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Cooper Kent J.
Lin Jung-Hui
Mazure Carlos A.
Ray Wayne J.
Roth Scott S.
Dockrey Jasper W.
Hearn Brian E.
Motorola Inc.
Picardat Kevin M.
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