Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-01-02
2007-01-02
Dildine, R. Stephen (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S755000
Reexamination Certificate
active
10530941
ABSTRACT:
The invention relates to an error correcting decoder apparatus (100) and method. The decoder apparatus (100) comprises a likelihood estimator (101) which generates a sequence of bit value likelihood estimates, such as log likelihood ratios, for multi bit symbols of a data sequence. The decoder apparatus (100) further comprises a decoder element (103), such as a Maximum A Priori (MAP) or appropriate Soft Output Viterbi decoder. The decoder element (103) generates a decoded data sequence in response to the bit value likelihood estimates. The decoder apparatus (100) also comprises a weighted processor (105) which generates a weighted compensation data sequence from the decoded data sequence. The weighted compensation data is used to modify the sequence of bit value likelihood estimates. The decoding is subsequently repeated using the improved bit value likelihood estimates whereby improved decoding performance is achieved. The invention may be applied to a two decoder element decoding apparatus (200) and may specifically be applied to turbo decoders.
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patent: 5867532 (1999-02-01), Ito et al.
patent: 2005/0086570 (2005-04-01), Ariyoshi
patent: 1 063 776 (2000-12-01), None
patent: WO 01 43294 (2001-06-01), None
Hagenauer J.: “Source-Controlled Channel Decoding”, IEEE Transactions on Communications, IEEE Inc., New York, US, vol. 43, No. 9, Sep. 1, 1995, pp. 2449-2457.
Whinnett Nicholas
Wood Steven
Yu Xiaoyong
Dildine R. Stephen
Motorola Inc.
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