Iterative concatenated code decoding circuit and...

Details Iterative concatenated code decoding circuit and... Iterative concatenated code decoding circuit and...

2006-08-22

2006-08-22

DeCady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S784000

Reexamination Certificate

active

07096403

ABSTRACT:
This invention provides an iterative concatenated code decoding circuit that allows a circuit size to be reduced and the error correction capability to be improved. A encoded data received through a transmission path from a first stage inner decoder is decoded, in which the decoded data is output to a first stage deinterleaver, and a first stage inner code syndrome coefficient corresponding to the decoded data is output to a second stage inner decoder. A first stage deinterleaver makes the deinterleaving of the decoded data, and outputs the deinterleaved data to a first stage outer decoder. The first stage outer decoder decodes the deinterleaved data and outputs the decoded data to a first stage interleaver, in which the first stage inner code modification syndrome coefficient is derived and output to a second stage inner decoder. The first stage interleaver makes the interleaving of the decoded data, and outputs the interleaved data to the second stage inner decoder.

REFERENCES:
patent: 5181209 (1993-01-01), Hagenauer et al.
patent: 5206864 (1993-04-01), McConnell
patent: 5311522 (1994-05-01), Murakami
patent: 5412620 (1995-05-01), Cafarella et al.
patent: 5432613 (1995-07-01), Lee
patent: 5583707 (1996-12-01), Seki
patent: 5631914 (1997-05-01), Kashida et al.
patent: 6516438 (2003-02-01), Wilcoxson et al.
patent: 6598203 (2003-07-01), Tang
patent: 6622277 (2003-09-01), Ramanujam et al.
patent: 6658605 (2003-12-01), Yoshida et al.
patent: 6769089 (2004-07-01), Gupta
patent: 1290428 (2001-04-01), None
patent: 1295382 (2001-05-01), None
patent: 1 324 501 (2003-07-01), None
patent: 6-303151 (1994-10-01), None
patent: 10-135845 (1998-05-01), None
patent: 2001-136079 (2001-05-01), None
patent: 2001-160761 (2001-06-01), None
European Search Report dated Sep. 24, 2004.
M. Anwarul Hasan, et al., “Algorithms and Architectures for the Design of a VLSI Reed-Solomon Codec”, Chapter 5 from the book, Wicker ed., 1994, XP2055402, pp. 60-107.
T. Mizuochi, et al., “Transparent Multiplexer Featuring Super FEC for Optical Transport Networking”, SubOptic 2001, p. 4.2.3, pp. 484-487, 2001.
Omar AIT SAB, “FEC Contribution in Submarine Transmission Systems”, SubOptic 2001, p. 4.2.6, pp. 496-499, 2001.
European Search Report dated Apr. 23, 2003.
O. Ait Sab, “FEC Contribution in Submarine Transmission Systems”, Suboptic 2001, May 2001, pp. 496-499, XP001151605.
F.J. Macwilliams, et al., “The Theory of Error-Correcting Codes Part I”, 1977, North-Holland, Amsterdam, XP002237954.
T. Mizuochi, et al., “Transparent Multiplexer featuring Super FEC for Optical Transport Networking”, Suboptic 2001, May 2001, pp. 484-487, XP001151604.
Japanese Office Action dated Sep. 24, 2004 with Partial English Translation.
Chinese Office Action dated Apr. 1, 2005 with English Translation.
T. Mizuochi, et al., “Transparent Multiplexer Featuring Super FEC for Optical Transport Networking”, SubOptic 2001, p. 4.2.3, pp. 484-487, 2001.
Omar AIT SAB, “FEC Contribution in Submarine Transmission Systems”, SubOptic 2001, p. 4.2.6, pp. 496-499, 2001.
H. Okano, “A Construction Method of High-Speed Decoders Using ROM's for Bose-Chaudhuri-Hocquengham and Reed-Solomon Codes”, IEEE Transactions on Computers, vol. C-36, No. 10, Oct. 1987, pp. 1164-1171 and 480-487.
Hideki Imai, “Coding Theory”, The Telecommunications Association, pp. 169-172, Mar. 15, 1990.

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