Issuing instructions in-order in an out-of-order processor...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C712S219000

Reexamination Certificate

active

08037366

ABSTRACT:
A mechanism is provided for issuing instructions. An instruction dispatch unit receives an instruction for dispatch to one of a plurality of execution units. The instruction dispatch unit analyzes a tag register to determine whether a previous tag associated with a previous instruction has been stored in the tag register. Responsive to the previous tag associated with the previous instruction failing to be stored in the tag register, the instruction dispatch unit storing a tag corresponding to the instruction in the tag register. The instruction dispatch unit dispatches the instruction to an issue queue for issue to the one of the plurality of execution units.

REFERENCES:
patent: 5134561 (1992-07-01), Liptay
patent: 5487156 (1996-01-01), Popescu et al.
patent: 5546597 (1996-08-01), Martell et al.
patent: 5625789 (1997-04-01), Hesson et al.
patent: 5625837 (1997-04-01), Popescu et al.
patent: 5745726 (1998-04-01), Shebanow et al.
patent: 5745780 (1998-04-01), Phillips et al.
patent: 5748934 (1998-05-01), Lesartre et al.
patent: 5751984 (1998-05-01), Chang et al.
patent: 5768575 (1998-06-01), McFarland et al.
patent: 5812812 (1998-09-01), Afsar et al.
patent: 5850533 (1998-12-01), Panwar et al.
patent: 5872949 (1999-02-01), Kikuta et al.
patent: 5884061 (1999-03-01), Hesson et al.
patent: 5898853 (1999-04-01), Panwar et al.
patent: 5941983 (1999-08-01), Gupta et al.
patent: 6006326 (1999-12-01), Panwar et al.
patent: 6542984 (2003-04-01), Keller et al.
patent: 7363467 (2008-04-01), Vajapeyam et al.
patent: 7660971 (2010-02-01), Agarwal et al.
patent: 7711929 (2010-05-01), Burky et al.
patent: 2006/0184771 (2006-08-01), Floyd et al.
patent: 2008/0189535 (2008-08-01), Agarwal et al.
patent: 2009/0063823 (2009-03-01), Burky et al.
patent: 2009/0063898 (2009-03-01), Eisen et al.
patent: 2009/0164729 (2009-06-01), Robinson
patent: 2009/0164734 (2009-06-01), Robinson
patent: 2009/0254735 (2009-10-01), Col et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Issuing instructions in-order in an out-of-order processor... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Issuing instructions in-order in an out-of-order processor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Issuing instructions in-order in an out-of-order processor... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4286888

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.