Issuing instructions in a processor supporting out-of-order exec

Details Issuing instructions in a processor supporting out-of-order exec Issuing instructions in a processor supporting out-of-order exec

1997-03-31

1999-03-23

Treat, William M.

395569, 39580023, G06F 946

Patent

active

058871616

ABSTRACT:
The invention relates to a method for issuing instructions in a processor. In one version of the invention, the method includes the steps of dispatching the instruction and source information to a queue, determining validity of the source information, and issuing the instruction for execution in response to the source information validity.

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