ISRAM layout and structure

Static information storage and retrieval – Systems using particular element – Flip-flop

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257903, 257904, G11C 1100, H01L 2711

Patent

active

057454043

ABSTRACT:
A triple-poly process forms a static random access memory (SRAM) which has a compact four-transistor SRAM cell layout. The cell layout divides structures among the three layers of polysilicon to reduce the area required for each cell. Additionally, a contact between a pull-up resistor formed in an upper polysilicon layer forms a "strapping" via which cross-couples a gate region and a drain region underlying the strapping via. Pull-up resistors extend across boundaries of cell areas to increase the length and resistance of the pull-up resistors.

REFERENCES:
patent: 4914629 (1990-04-01), Blake et al.
patent: 4951112 (1990-08-01), Choi et al.
patent: 5057893 (1991-10-01), Sheng et al.
patent: 5166902 (1992-11-01), Silver
patent: 5359226 (1994-10-01), DeJong

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