Isolation structures for integrated circuit devices

Details Isolation structures for integrated circuit devices Isolation structures for integrated circuit devices

2008-02-14

2010-10-12

Blum, David S (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S513000, C257SE29001

Reexamination Certificate

active

07812403

ABSTRACT:
An isolated CMOS pair of transistors formed in a P-type semiconductor substrate includes an N-type submerged floor isolation region and a filled trench extending downward from the surface of the substrate to the floor isolation region. Together the floor isolation region and the filled trench form an isolated pocket of the substrate which contains a P-channel MOSFET in an N-well and an N-channel MOSFET in a P-well. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same.

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