Isolation structure for semiconductor device including...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S545000, C257S345000, C257S544000, C257SE29019

Reexamination Certificate

active

07485922

ABSTRACT:
In a semiconductor device of the present invention, an N type epitaxial layer is formed on a P type single crystal silicon substrate. The substrate and the epitaxial layer are partitioned into a plurality of element formation regions by isolation regions. Each of the isolation regions is formed of a P type buried diffusion layer and a P type diffusion layer coupled thereto. The P type buried diffusion layer is joined to N type buried diffusion layers on both sides thereof to form PN junction regions. On the other hand, the P type diffusion layer is joined to N type diffusion layers on both sides thereof to form PN junction regions. This structure suppresses extension of widthwise diffusion of the P type buried diffusion layer and the P type diffusion layer, thus making it possible to reduce the device size.

REFERENCES:
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patent: 5218224 (1993-06-01), Taguchi
patent: 6692982 (2004-02-01), Takahashi et al.
patent: 6864525 (2005-03-01), Kaneko et al.
patent: 1428860 (2003-07-01), None
patent: 1435891 (2003-08-01), None
patent: 63-43343 (1988-02-01), None
patent: 2003-197793 (2003-07-01), None

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