Isolation process and structure for CMOS imagers

Details Isolation process and structure for CMOS imagers Isolation process and structure for CMOS imagers

2006-08-15

2006-08-15

Quach, T. N. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S292000, C257S510000, C257SE31053

Reexamination Certificate

active

07091536

ABSTRACT:
A barrier implanted region of a first conductivity type located below an isolation region of a pixel sensor cell and spaced from a doped region of a second conductivity type of a photodiode of the pixel sensor cell is disclosed. The barrier implanted region is formed by conducting a plurality of deep implants at different energies and doping levels below the isolation region. The deep implants reduce surface leakage and dark current and increase the capacitance of the photodiode by acting as a reflective barrier to electrons generated by light in the doped region of the second conductivity type of the photodiode.

REFERENCES:
patent: 6310366 (2001-10-01), Rhodes et al.
patent: 6423993 (2002-07-01), Suzuki et al.
patent: 6569700 (2003-05-01), Yang
patent: 6590271 (2003-07-01), Liu et al.

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