Isolation method in a semiconductor device

Details Isolation method in a semiconductor device Isolation method in a semiconductor device

1992-01-17

1993-10-12

Fourson, G.

Fishing, trapping, and vermin destroying

437 72, 437968, H01L 2176

Patent

active

052525112

ABSTRACT:
An isolation method in a semiconductor device which includes the steps of growing a pad oxide layer on a semiconductor substrate, depositing a polysilicon layer and a first silicon nitride layer on the pad oxide layer, removing and patterning the first silicon nitride layer to define an active region and a field region, depositing a second silicon nitride layer and a thick oxide layer, forming oxide spacers and nitride spacers, ion-implanting impurities, removing the oxide spacers, growing a field oxide layer, and sequentially removing the first silicon nitride layer, the nitride spacers, the polysilicon layer, and the pad oxide layer. This method minimizes the bird's beaks regions and increases the effective isolation distance of the device.

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