Isolation control circuit and method for a memory device

Details Isolation control circuit and method for a memory device Isolation control circuit and method for a memory device

2007-11-20

2007-11-20

Lam, David (Department: 2827)

Static information storage and retrieval

Read/write circuit

C365S230030, C365S203000, C365S205000

Reexamination Certificate

active

11073765

ABSTRACT:
A semiconductor memory includes a memory cell array, a sense amplifier, an isolation device interposed between the sense amplifier and a bit line of the memory cell array, and circuitry for transferring a charge contained in a memory cell of memory cell array to the bit line while the isolation device electrically isolates the bit line from the sense amplifier, and, after the charge is transferred to the bit line, for causing the isolation device to electrically connect the bit line to the sense amplifier.

REFERENCES:
patent: 5553028 (1996-09-01), McLaury
patent: 6023437 (2000-02-01), Lee
patent: 6118713 (2000-09-01), Raad
patent: 6230292 (2001-05-01), Duesman et al.
patent: 6549480 (2003-04-01), Hosogane et al.
patent: 6600684 (2003-07-01), Satani et al.

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