Isolation chamber arrangement for serial processing of...

Coating apparatus – Gas or vapor deposition – Multizone chamber

Reexamination Certificate

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Details

C118S729000, C118S730000, C156S345310, C204S298250, C204S298270, C204S298280, C204S298350, C414S935000, C414S939000

Reexamination Certificate

active

06827789

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to apparatus and methods for the treatment and processing of semiconductor wafers.
2. Prior Art
Semiconductor wafers are utilized in the modem electronics industry for the production of very large scale integrated (VLSI) circuits and Ultra Large Scale Integrated (UlSI) circuits and chips and the like. Such semiconductor wafers must go through a wide variety of high manufacturing standards steps in order to produce a perfect semiconductor product.
During that production process, the wafers must be treated by a series of sequential steps. The processing of these wafers may include oxidation, ion implantation, thermal annealing, deposition, etching, passivation and packaging. The thermal annealing and solder reflow may be some of the most important steps in VLSI/ULSI. Some prior art processing operations may include the use of a continuous drive belt through a furnace heating and a cooling zones. Such a system, however, requires large clean rooms, and they operate under expensive operating conditions. Other prior art processing may be done on semiconductor wafers in a batch process. Uniformity and consistency of a product is difficult to maintain or achieve in these processes. Such prior art operations in either a belt or batch process are also often very expensive and very complicated.
It is an object of the present invention to overcome the disadvantages of the prior art.
It is a further object of the present invention to provide a wafer processing operation which simplifies the automation needed to effectively and efficiently handle and treat a semiconductor wafer.
It is still a further object of the present invention to provide a semiconductor wafer processing arrangement which minimizes the equipment size required for this operation.
It is yet a still further object of the present invention to provide a wafer processing arrangement which minimizes the cost of such wafer processing.
It is still yet a further object of the present invention to provide an apparatus for the continuous treatment of semiconductor wafers in a clean and controllable manner not found in the prior art.
BRIEF SUMMARY OF THE INVENTION
The present invention relates to a wafer processing arrangement for the sequential isolated treatment of semiconductor wafers. The processing arrangement comprises a frame support for a wafer process table and a wafer feed and removal robot arrangement thereadjacent. The wafer process table comprises a plurality of housing covers each positioned on a stationary upper plate as part of a treatment module for each position in the process of treatment of the semiconductor wafers.
The wafer process table includes a stationary lower housing platen surrounding a central transmission drive unit which indexes an indexable rotary index plate between a plurality of treatment modules through the sequential steps in the treatment process at the wafer process table.
Each step in the process is accomplished as the intermediately disposed rotary index plate rotatively indexes through a series of positions, which positions register with the upper plate and the housing covers associated therewith, and the stationary lower housing platen with its respective treatment modules.
The stationary lower plate includes for each position in the process, an opening therethrough with a lower portion of the processing or treatment module thereattached. The processing module attached to the lower side of the stationary lower plate consists of a lower cup or housing. The lower housing has an upper edge defined by an annular lip which is secured to the periphery of its respective opening in the lower plate of the process table. The lower plate and lower housing is stationary with respect to the upper plate of the process table and frame.
The intermediate rotary indexing plate is arranged between the upper plate of the process table and the lower plate supporting the outer lower cup shaped housing at each processing module therearound. The rotary indexing plate has spaced apart openings on which a vertically liftable annular wafer ring is disposed. Each vertically liftable annular wafer ring has a plurality of circumferentially spaced openings therethrough to provide a fluid communication between the stationary upper chamber at each processing module and the outer lower housing of each processing module. Each wafer ring has at least three radially inwardly directed wafer support pins extending therefrom. Each wafer pin has a radially inwardly directed shoulder. As the rotary index plate advances rotationally from treatment module to treatment module in sequence around the wafer processing table, a robotic arm loads and unloads a semiconducter wafer at the particular loading and unloading station in the sequence. The wafer is placed upon the upper side of the shoulder of the wafer support pins which extend radially inwardly from the inner edge of the wafer ring. The shoulders on the pins provides lateral control to a wafer supported on those pins as the index plate is rotated.
Each processing module location has a lower support housing associated therewith. The lower support housing includes a support column extending therethrough. A wafer treatment plate is arranged on the upper end of the support column extending through the support housing. The treatment plate is arranged within a vertically displacable isolation chamber. The support column moves the isolation chamber and the treatment plate arranged therewithin, into vertical supportive contact with a semiconductor wafer held by the wafer support pins extending radially inwardly from the wafer ring supported on the indexing plate. The treatment plate, preferably of circular configuration, has a corresponding radially inwardly directed grooves arranged therein, for spaced enclosive receipt of the radially inwardly directed wafer support pins. As the treatment plate is moved vertically upwardly, it contacts and lifts the wafer slightly away from the wafer support pins to permit full engagement of the treatment plate with respect to the wafer support pins.
During this part of the process, the isolation chamber, which has an O ring around its upper peripheral edge, engages the lower side of the wafer ring. The lower peripheral edge of the inverted upper chamber has an O ring therearound. As the treatment plate is driven upwardly, the rising lower chamber lifts the wafer support ring slightly and presses the upper side of the wafer ring against the lower periphery of the housing cover or stationary upper chamber to define an isolation chamber therebetween which is thus formed between the stationary upper chamber and the upwardly movable isolation housing.
The treatment plate may comprise heating elements therewith, or cooling elements, therewith, so as to touchingly engage and more rapidly heat the semiconductor wafer thereon or touchingly engage and more rapidly chill that semiconductor thereon depending upon which position that particular semiconductor wafer is at in the process table.
A treatment port may be arranged through the stationary upper housing, to provide a vacuum to the isolation chamber, or to provide a chemical vapor deposition (CVD) or a physical vapor deposition (PVD), an RF generator, or a plasma therethrough or a combination thereof for treatment of that particular semiconductor wafer at that particular module in the apparatus.
The support housing beneath the outer lower housing may include a bellows to permit the longitudinal advancement and withdrawal of the support column of the housing while maintaining the ambient relationship within the isolation chamber. A treatment plate and isolation housing lift and retraction mechanism is also arranged within the support housing to provide the vertical advance and vertical withdrawal of the treatment plate from a semiconductor wafer supported on the wafer support pins on the wafer ring. A vacuum and/or sensors may extend through one or more of the support housings to provide suction to a wafer on the plate for holding

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