Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive
Reexamination Certificate
2006-05-05
2010-11-02
Such, Matthew W (Department: 2891)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Physical stress responsive
C257SE21520, C977S732000
Reexamination Certificate
active
07824946
ABSTRACT:
The present invention is directed to structures and methods of fabricating electromechanical memory cells having nanotube crossbar elements. Such memory cells include a substrate having transistor with a contact that electrically contacts with the transistor. A first support layer is formed over the substrate with an opening that defines a lower chamber above the electrical contact. A nanotube crossbar element is arranged to span the lower chamber. A second support layer is formed with an opening that defines a top chamber above the lower chamber, the top chamber including an extension region that extends beyond an edge of the lower chamber to expose a portion of the top surface of the first support layer. A roof layer covers the top of the top chamber and includes an aperture that exposes a portion of the extension region of the top chamber and includes a plug that extends into the aperture in the roof layer to seal the top and bottom chambers. The memory cell further includes an electrode that overlies the crossbar element such that electrical signals can activate the electrode to attract or repel the crossbar element to set a memory state for the transistor.
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Bertin Claude L.
Burke Peter A.
Carter Richard J.
Hornback Verne C.
Rueckes Thomas
Nantero Inc.
Such Matthew W
Wilmer Cutler Pickering Hale and Dorr LLP
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