Isolated high-voltage LDMOS transistor having a split well...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S335000

Reexamination Certificate

active

06903421

ABSTRACT:
The isolated high-voltage LDMOS transistor according to the present invention includes a split N-well and P-well in the extended drain region. The P-well is split in the extended drain region of the N-well to form a split junction-field in the N-well. The split N-well and P-well deplete the drift region, which shifts the electric field maximum into the bulk of the N-well. This achieves a higher breakdown voltage and allows the N-well to have a higher doping density. Furthermore, the LDMOS transistor according to the present invention includes a N-well embedded beneath the source diffusion region. This creates a low-impedance path for the source region, which restricts the transistor current flow between the drain region and the source region.

REFERENCES:
patent: 4811075 (1989-03-01), Eklund et al.
patent: 5258636 (1993-11-01), Rumennik et al.
patent: 5313082 (1994-05-01), Eklund et al.
patent: 6525390 (2003-02-01), Tada et al.
patent: 6570219 (2003-05-01), Rumennik et al.
patent: 6617652 (2003-09-01), Noda et al.

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