Isolated fully depleted silicon-on-insulator regions by...

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – With extended latchup current level

Reexamination Certificate

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C257S311000, C257S479000

Reexamination Certificate

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10710821

ABSTRACT:
The present invention provides a method of forming an ultra-thin and uniform layer of Si including the steps of providing a substrate having semiconducting regions separated by insulating regions; implanting dopants into the substrate to provide an etch differential doped portion in the semiconducting regions underlying an upper Si-containing surface of the semiconducting regions; forming a trench in the substrate including the semiconducting regions and the insulating regions; removing the etch differential doped portion from the semiconductor regions to produce a cavity underlying the upper surface of the semiconducting regions; and filling the trench with a trench dielectric, wherein the trench dielectric material encloses the cavity underlying the upper Si-containing surface of the semiconducting regions. The upper Si-containing surface of the semiconducting regions has a uniform thickness of less than about 100 Å.

REFERENCES:
patent: 5306659 (1994-04-01), Beyer et al.
patent: 5324683 (1994-06-01), Fitch et al.
patent: 5391911 (1995-02-01), Beyer et al.
patent: 6020250 (2000-02-01), Kenney
patent: 6492705 (2002-12-01), Begley et al.
patent: 7007075 (1995-10-01), None
M.Q. Huda, et al., “Technique for Large Elevation of Source/Drain Using Implantation Mediated Selective Etching”,Electrochemical and Solid-State Letters, pp. G117-G118 (2003).

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