IP placement validation

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07469398

ABSTRACT:
A method for defining valid placement of intellectual property (IP) blocks within a platform application specific integrated circuit comprising the steps of (A) extracting IP recorded information for an intellectual property (IP) block to be placed on a platform application specific integrated circuit, (B) extracting device data for the platform application specific integrated circuit and (C) determining one or more valid placement locations for the intellectual property (IP) block based upon the IP recorded information and the device data.

REFERENCES:
patent: 2002/0188910 (2002-12-01), Zizzo
patent: 2005/0235244 (2005-10-01), Byrn et al.
patent: 2006/0193346 (2006-08-01), McKernan

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