Ion implantation combined with in situ or ex situ heat...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S909000, C438S943000, C257S350000, C257SE21321, C257SE21336

Reexamination Certificate

active

07968459

ABSTRACT:
This invention teaches methods of combining ion implantation steps with in situ or ex situ heat treatments to avoid and/or minimize implant-induced amorphization (a potential problem for source/drain (S/D) regions in FETs in ultrathin silicon on insulator layers) and implant-induced plastic relaxation of strained S/D regions (a potential problem for strained channel FETs in which the channel strain is provided by embedded S/D regions lattice mismatched with an underlying substrate layer). In a first embodiment, ion implantation is combined with in situ heat treatment by performing the ion implantation at elevated temperature. In a second embodiment, ion implantation is combined with ex situ heat treatments in a “divided-dose-anneal-in-between” (DDAB) scheme that avoids the need for tooling capable of performing hot implants.

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Morehead, F.F. et al., “Formation of Amorphous Silicon by Ion Bombardment as a Function of Ion, Temperature, and Dose,” J. Appl. Phys. 43 1112, 1972.

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