Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2011-03-08
2011-03-08
Doan, Duc T (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
Reexamination Certificate
active
07904692
ABSTRACT:
Example embodiments of an IOMMU with translation request management and methods for managing translation requests are generally described herein. Other example embodiments may be described and claimed. In some example embodiments, the IOMMU comprises one or more reorder buffers. Each reorder buffer may be associated with one I/O device and may be used to queue pending translation requests for the associated I/O device. A translation request received from a requesting I/O device may be stored in a reorder buffer associated with the requesting I/O device when the translation request is unable to be serviced or when there are one or more pending translation requests in the reorder buffer.
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“International Application Serial No. PCT/US2009/039790, Search Report mailed Jun. 2, 2009”, 4 pgs.
“International Application Serial No. PCT/US2009/039790, Written Opinion mailed Jun. 2, 2009”, 5 pgs.
Galles Michael
Johnson Scott
Mukherjee Shrijeet
Doan Duc T
Gorrie Gregory J.
Schwegman Lundberg & Woessner, P.A.
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