Invalidating multiple address cache entries

Details Invalidating multiple address cache entries Invalidating multiple address cache entries

2005-08-11

2008-12-30

Bragdon, Reginald G. (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S135000, C711S156000, C711S206000, C711S207000

Reexamination Certificate

active

07472227

ABSTRACT:
In a first aspect, a first method is provided for removing entries from an address cache. The first method includes the steps of (1) writing data to a register; and (2) removing a plurality of address cache entries from the address cache based on the data written to the register. Numerous other aspects are provided.

REFERENCES:
patent: 4682281 (1987-07-01), Woffinden et al.
patent: 6684315 (2004-01-01), James et al.
patent: 7188215 (2007-03-01), Hooker

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