Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2005-03-24
2008-12-02
Thai, Luan (Department: 2891)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S121000, C438S106000
Reexamination Certificate
active
07459346
ABSTRACT:
A semiconductor device for dissipating heat generated by a die during operation and having a low height profile, a semiconductor die package incorporating the device, and methods of fabricating the device and package are provided. In one embodiment, the semiconductor device comprises a thick thermally conductive plane (e.g., copper plane) mounted on a thin support substrate and interfaced with a die. Thermally conductive via interconnects extending through the substrate conduct heat generated by the die from the conductive plane to conductive balls mounted on traces on the opposing side of the substrate. In another embodiment, the semiconductor devices comprises a thick thermally conductive plane (e.g., copper foil) sandwiched between insulative layers, with signal planes (e.g., traces, bonding pads) disposed on the insulative layers, a die mounted on a first signal plane, and solder balls mounted on bonding pads of a second signal plane. A thermally conductive via interconnect extends through the substrate to provide a thermal path from the die and signal plane (traces) through the thick conductive plane and into the solder balls and external device (e.g., mother board). The present semiconductor device provides effective heat dissipation without the attachment of an external heat sink or spreader.
REFERENCES:
patent: 5561322 (1996-10-01), Wilson
patent: 5640048 (1997-06-01), Selna
patent: 5811879 (1998-09-01), Akram
patent: 6048755 (2000-04-01), Jiang et al.
patent: 6117705 (2000-09-01), Glenn et al.
patent: 6117797 (2000-09-01), Hembree
patent: 6122171 (2000-09-01), Akram et al.
patent: 6218731 (2001-04-01), Huang et al.
patent: 6229204 (2001-05-01), Hembree
patent: 6236116 (2001-05-01), Ma
patent: 6268650 (2001-07-01), Kinsman et al.
patent: 6282094 (2001-08-01), Lo et al.
patent: 6297960 (2001-10-01), Moden et al.
patent: 6320253 (2001-11-01), Kinsman et al.
patent: 6337228 (2002-01-01), Juskey et al.
patent: 6359341 (2002-03-01), Huang et al.
patent: 6372552 (2002-04-01), Kinsman et al.
patent: 6376908 (2002-04-01), Gaku et al.
patent: 6416625 (2002-07-01), Wang et al.
patent: 6426875 (2002-07-01), Akram et al.
patent: 6462274 (2002-10-01), Shim et al.
patent: 6493229 (2002-12-01), Akram et al.
patent: 6534861 (2003-03-01), Castro
patent: 6657296 (2003-12-01), Ho et al.
patent: 6867493 (2005-03-01), Hashemi et al.
patent: 6882042 (2005-04-01), Zhao et al.
Lee Teck Kheng
Yee Pak Hong
Micro)n Technology, Inc.
Thai Luan
Whyte Hirschboeck Dudek SC
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