Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2000-06-14
2004-10-05
Bataille, Pierre (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S212000, C365S049130, C365S203000
Reexamination Certificate
active
06801981
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to content addressable memories (CAMs), and more particularly to intra-row configurability of a CAM array.
BACKGROUND
A content addressable memory (CAM) system is a storage system that can be instructed to compare a specific pattern of comparand data with data stored in its associative CAM array. The entire CAM array, or segments thereof, is searched in parallel for a match with the comparand data. The CAM device typically includes a priority encoder to translate the highest priority matching location into a match address or CAM index.
The CAM array has rows of CAM cells that each store a number of bits of a data word. U.S. Pat. No. 5,440,715 describes a technique for expanding the width of the data words beyond that of a single row of CAM cells. This inter-row configurability provides flexibility in the use of the single CAM array to store data words larger than that available in a single addressable row of CAM cells.
It would be desirable to have a CAM system that includes intra-row configurability to provide additional flexibility in the use of a single CAM array to be used in multiple array configurations. Intra-row configurability is the ability to access and operate upon one or more segments of rows of CAM cells.
SUMMARY OF THE INVENTION
A CAM system having intra-row configurability is disclosed. For one embodiment, the CAM system includes a CAM array having a number of rows of CAM cells each segmented into row segments. Each row segment includes a number of CAM cells coupled to a corresponding match line segment. Individual row segments or groups of row segments are uniquely addressable by address logic in response to configuration information that indicates a width and depth configuration of the CAM array. The configuration information may be stored in a configuration register. Data may be communicated with an addressed row segment or group of row segments using data access circuitry. Priority encoding circuitry may be included to generate the address of a row segment or group of row segments that stores data matching comparand data in response to the configuration information. Match flag logic may also be included to determine when comparand data matches data stored in one of the row segments or one of the groups of row segments in response to the configuration information. Additionally, multiple match flag logic may be included to determine when comparand data matches data stored in each of a plurality of row segments and to determine when comparand data matches data stored in each of a plurality of groups of row segments in response to the configuration information.
Other objects, features, and advantages of the present invention will be apparent from the accompanying drawings and from the detailed description that follows below.
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Pereira Jose Pio
Srinivasan Varadaraian
Bataille Pierre
Blakely , Sokoloff, Taylor & Zafman LLP
Netlogic Microsystems Inc.
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