Interrupt processing and memory management method in an...

Details Interrupt processing and memory management method in an... Interrupt processing and memory management method in an...

2001-03-09

2004-11-16

Vo, Tim (Department: 2181)

Electrical computers and digital data processing systems: input/

Interrupt processing

C710S267000, C710S268000, C710S026000

Reexamination Certificate

active

06820153

ABSTRACT:

FIELD OF THE INVENTION
This invention concerns a program switching or thread interrupt processing method in an operation processing device and the device using such interrupt processing method, which causes a specific program being executed to be temporarily halted in response to an interrupt so that another program can be executed. More specifically, the invention concerns interrupt processing in an operation processing device which can create a memory work area dynamically depending on the program content being currently processed.
BACKGROUND OF THE INVENTION
Recent operation processing devices which execute multithread processes set up a separate work area or memory location (hereafter, these areas are referred to as “thread work areas”) for each thread. When a thread being executed needs to access programs, it accumulates work areas, which are called “frames,” in the thread work area. It executes these programs in order, starting with the one most recently accessed.
When this type of operation processing device receives an interrupt signal, it has to interrupt the program being executed in order to run some other program. To do this it must set up an area (hereafter referred to as the “storage area for sidetracked data”) to sidetrack the register state and progress of the program being executed at the moment the interrupt was generated. Since a number of interrupts may be generated in series, a stack data container or area is designated where the sidetracked data for each interrupt can be stored in the order received.
FIG. 6
shows a prior art configuration for this sort of operation processing device.
In the figure, program executing unit
31
to execute the program, interrupt control unit
32
to control interrupts and side track and restore data unit
33
to sidetrack and restore data are all realized by the functions of a processor (i.e., a CPU), which is not pictured. Thread work area
34
, interrupt program work area
35
and sidetrack data storage area
36
for sidetracked data are all set up in a RAM. Interrupt vector storage area
37
for interrupt vectors and storage area
38
for values to generate interrupts (hereafter referred to simply as “interrupt value storage area
38
”) are set up in either a ROM or a RAM.
Program executing unit
31
has an internal register
30
, in which are stored the data it needs to run a program. As it executes a program, it reads and writes data to and from internal register
30
and the thread work area
34
for the thread it is executing. The aforesaid internal register
30
contains a program counter, which is the register to store addresses needed to run the program; a thread address register, which stores the address of the thread work area
34
for the thread being used; a status register, which stores data indicating the internal status of the processor; and a universal register, which stores the results of the operations.
Interrupt control unit
32
receives an interrupt signal and determines whether the interrupt program requesting processing demanded by that signal should be given priority over the currently running program. If it determines that the interrupt program should be given priority, it activates sidetrack and restore data unit
33
.
Sidetrack and restore data unit
33
temporarily sidetracks the values in internal register
30
(hereafter, the “register data”) at the moment the interrupt was generated. When the interrupt program's processing is completed, it returns the aforesaid sidetracked register data to internal register
30
and restores the operating status or register state of the halted program. Sidetrack and restore data unit
33
has inside it a stack pointer to indicate which data is at the head of the stack.
FIG. 7
shows the configuration of the data in the memory of the operation processing device in the aforesaid
FIG. 6
which is a prior art.
A thread work area
34
is set up for each thread that is activated (in the example, there are M number of work areas). A thread work area
34
is set up for each program started up to access a function and the likes, in the order in which they are accessed. As their programs are completed, these program work areas disappear, and in their locations, new work areas are set up as new programs are accessed.
The number of areas which are set up in sidetrack data storage area
36
(in the example, N number of areas) should be equal to the number of interrupts anticipated. A number of work areas (in the example, L number of work areas) are set up in interrupt program work area
35
for interrupt programs, which is divided into segments according to the number of interrupt programs. If the same interrupt is to be generated numerous times, the work area for each interrupt program must be large enough to accommodate the processing executed by that program being repeated that same number of times.
A number of pointers (called “program pointers”), separately created for each of the interrupt programs indicated by the type of interrupt signal, are stored in interrupt vectors storage area
37
for interrupt vectors. The initial values for internal register
30
, which are needed to run the programs corresponding to the pointers, and the head address for the work area assigned to each program are stored in interrupt value storage area
38
.
FIG. 8
shows the order of processing executed when an interrupt is generated.
FIG. 9
shows the order of processing executed when the interrupt program has completed executing. For the sake of convenience, each step in the charts has been given a number.
We shall next explain, with reference to the flow charts, the processing executed in an operation processing device configured as shown in
FIG. 6
when an interrupt is generated and when the interrupt program's processing has been completed.
When an interrupt signal is received while program executing unit
31
is in the process of executing a given program, interrupt control unit
32
checks the priority of the interrupt program associated with that signal (Step 1). If unit
32
determines that the interrupt program awaiting processing has a lower priority than the program being executed, we go to Step 10, and unit
32
executes masking processing to cause the interrupt program to wait until the current program has been completed.
If program executing unit
32
determines that the interrupt program requesting processing has a higher priority than the current program, it reads the program pointer corresponding to the aforesaid interrupt signal out of the aforesaid interrupt vector storage area
37
and sends it to sidetrack and restore data unit
33
(Step 2).
When unit
33
receives this pointer, it sends a request to interrupt the currently executing main program to the aforesaid program executing unit
31
(Step 3). Unit
31
interrupts the said executing program in response to this interrupt request, reads the current register data out of internal register
30
and sends them to sidetrack and restore data unit
33
.
When unit
33
receives the register data and so is informed that the program has been interrupted, it stores the data it has just received on the stack level in storage area
36
indicated by the value of the aforesaid stack pointer (Steps 4 and 5).
Sidetrack and restore data unit
33
reads the data corresponding to the value of the aforesaid program pointer out of the aforesaid storage area
38
and sends said data to unit
31
to be executed (Step 6). Based on the data it receives, program executing unit
31
initializes internal register
30
and executes processing to switch the thread from the work area currently in use to that designated for the interrupt program (Step 7).
When these steps have been completed, sidetrack and restore data unit
33
increments the aforesaid stack pointer by 1 and sends unit
31
a request to start the interrupt program (Steps 8 and 9).
Program executing unit
31
runs the interrupt program and then sends a notification that said program has finished to sidetrack and restore data unit
33
. When it receives this not

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