Electrical computers and digital data processing systems: input/ – Interrupt processing – Interrupt prioritizing
Reexamination Certificate
2006-07-18
2006-07-18
Cerullo, Jeremy S. (Department: 2112)
Electrical computers and digital data processing systems: input/
Interrupt processing
Interrupt prioritizing
C710S263000
Reexamination Certificate
active
07080178
ABSTRACT:
A data processing system nested interrupt controller24responsive to priority level values28, 30associated with respective interrupt handling programs to control the execution of those interrupt handling programs. The priority level values have a first portion28which controls whether or not a pending interrupt handling program will pre-empt an already active interrupt handling program and a second portion30which controls which of a plurality of pending interrupt handling programs will be executed next when they share the same value for the first portion of their priority level value.
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patent: 6539448 (2003-03-01), Deng
patent: 6578064 (2003-06-01), Saito et al.
patent: 6618780 (2003-09-01), Popat
Field Ian
Kimelman Paul
ARM Limited
Cerullo Jeremy S.
Nixon & Vanderhye P.C.
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