Interrupt mechanism for multiprocessing system having a pluralit

Details Interrupt mechanism for multiprocessing system having a pluralit Interrupt mechanism for multiprocessing system having a pluralit

1985-05-15

1988-04-05

Williams, Jr., Archie E.

Boots, shoes, and leggings

379269, 379279, G06F 1324

Patent

active

047363193

ABSTRACT:
A multiprocessing system has a plurality of processors each having a unique interrupt. An executive processor issues interrupt requests over a global bus having a plurality of interrupt lines. A plurality of bus interface systems are each connected to a different interrupt line in the global bus and to a cell bus. A master cell processor and a plurality of slave cell processors are connected to different interrupt lines in the cell bus. All interrupt requests to a cell go first to the master cell processor and then to a slave processor as appropriate.

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patent: 4484273 (1984-11-01), Stiffler et al.
patent: 4513370 (1985-04-01), Ziv

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