Interrupt masking control

Details Interrupt masking control Interrupt masking control

2011-02-01

2011-02-01

Myers, Paul R (Department: 2111)

Electrical computers and digital data processing systems: input/

Interrupt processing

Interrupt inhibiting or masking

C710S005000, C710S244000

Reexamination Certificate

active

07882293

ABSTRACT:
A processor core4is provided with an interrupt controller22which serves to set an interrupt mask bit F and a hardware control when an interrupt fiq occurs. A masking control signal NMI serves to either allow or prevent the software clearing of the interrupt mask bit F.

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