Interrupt management system having batch mechanism for handling

Details Interrupt management system having batch mechanism for handling Interrupt management system having batch mechanism for handling

1999-01-21

2000-09-05

Etienne, Ario

Electrical computers and digital data processing systems: input/

Interrupt processing

Interrupt inhibiting or masking

710260, 710266, 710 49, G06F 1324

Patent

active

061157791

ABSTRACT:
An interrupt management system that enables a user to handle interrupt events either in a real time mode of operation, or in a batch mode of operation. In the real time mode, an interrupt request signal is asserted in response to each interrupt event. In the batch mode, an interrupt request signal is delayed until a predetermined number of interrupt events is detected, or until a predetermined time interval has elapsed since the last interrupt event is captured. In response to an interrupt event, the corresponding bit in an interrupt register is set to an active state. A control interrupt bit is provided in an interrupt control register for each interrupt to enable the activation of an interrupt request pin in response to the interrupt event. A batch enable bit is provided in a batch register for each interrupt event to enable the batching of the interrupt event.

REFERENCES:
patent: 5708817 (1998-01-01), Ng et al.
patent: 5905913 (1999-05-01), Garrett et al.
patent: 5941964 (1999-08-01), Young et al.

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