Interrupt mailbox in host memory

Electrical computers and digital data processing systems: input/ – Interrupt processing – Interrupt queuing

Reexamination Certificate

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Details

C710S268000

Reexamination Certificate

active

07743195

ABSTRACT:
Embodiments of an interrupt mailbox in host memory are described herein. In an implementation, a device connected to a host writes interrupt data corresponding to an interrupt generated by the device to host memory. Then, the host, when processing the interrupt, accesses the interrupt data from the host memory.

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