Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
2006-10-26
2009-02-17
Dang, Khanh (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
Reexamination Certificate
active
07493436
ABSTRACT:
Disclosed are a method, information processing system, and computer readable medium for managing interrupts. The method includes placing at least one physical processor of an information processing system in a simultaneous multi-threading mode. At least a first logical processor and a second logical processor associated with the at least one physical processor are partitioned. The first logical processor is assigned to manage interrupts and the second logical processor is assigned to dispatch runnable user threads.
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Blackmore Robert S.
Govindaraju Rama K.
Hochschild Peter H.
Bongini Stephen
Campbell John E.
Dang Khanh
Fleit Gibbons Gutman Bongini & Bianco P.L.
International Business Machines - Corporation
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