Interrupt handling in systems having multiple...

Details Interrupt handling in systems having multiple... Interrupt handling in systems having multiple...

2006-05-02

2006-05-02

Dang, Khanh (Department: 2111)

Electrical computers and digital data processing systems: input/

Interrupt processing

Programmable interrupt processing

C710S268000, C710S316000

Reexamination Certificate

active

07039740

ABSTRACT:
An interconnection controller for use in a computer system having a plurality of processor clusters is described. Each cluster includes a plurality of local nodes and an instance of the interconnection controller. The interconnection controller is operable to transmit locally generated interrupts to others of the clusters, and remotely generated interrupts to the local nodes. The interconnection controller is further operable to aggregate locally generated interrupt responses for transmission to a first remote cluster from which a first interrupt corresponding to the locally generated responses was generated. The interconnection controller is also operable to aggregate remotely generated responses for transmission to a first local node from which a second interrupt corresponding to the remotely generated responses was generated. A computer system employing such an interconnection controller is also described.

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INTEL Multiprocessor Specification, Version 1.4, pp. 63-64.
HyperTransport™ l/O Link Specification Revision 1.03, HyperTransport™ Consortium, Oct. 10, 2001, Copyright © 2001 HyperTransport Technology Consortium.

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