Electrical computers and digital data processing systems: input/ – Interrupt processing – Programmable interrupt processing
Reexamination Certificate
2011-05-31
2011-05-31
Stiglic, Ryan M (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
Programmable interrupt processing
C710S260000, C710S261000, C710S267000, C710S268000, C710S269000
Reexamination Certificate
active
07953915
ABSTRACT:
Disclosed is an interrupt dispatching system and method in a multi-core processor environment. The processor includes an interrupt dispatcher and N cores capable of interrupt handling which are divided into a plurality of groups of cores, where N is a positive integer greater than one. The method generates a token in response to an arriving interrupt; determines a group of cores to be preferentially used to handle the interrupt as a hot group in accordance with the interrupt; and sends the token to the hot group, determines sequentially from the first core in the hot group whether an interrupt dispatch termination condition is satisfied, and determines the current core as a response core to be used to handle the interrupt upon determining satisfaction of the interrupt dispatch termination condition. With the invention, delay in responding to an interrupt by the processor is reduced providing optimized performance of the processor.
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Ge Yi
Liu ChaoJun
Ping Yuan
Shen Wen Bo
International Business Machines - Corporation
Stiglic Ryan M
The Brevetto Law Group
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