Interrupt controller that reduces the number of scans needed to

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395733, 395727, G06F 946

Patent

active

054817293

ABSTRACT:
An interrupt controller is so configured that if the priority level is divided into 2.sup.n or less levels, the priority levels are scanned in the order of 2.sup.n .fwdarw.2.sup.n-1 .fwdarw.. . . 2.sup.0, and the priority levels having the same order of priority are scanned on the basis of the default values at only one timing. Therefore, even if interrupt requests having the same priority levels compete with each other, an interrupt request signal having the highest priority level can be detected from the competing interrupt requests with only (n+1) timings.

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