Patent
1993-09-24
1994-11-29
Richardson, Robert L.
G06F 1300
Patent
active
053697464
ABSTRACT:
An information processor including a plurality of processors interconnected by communication means, each processor having a memory storing a program and data, an instruction interpretation section for interpreting instructions in the program, and an instruction execution section for executing the result of interpretation. Each processor referring to the address of source data or destination data indicated by an operand of a data transfer instruction, and determining which of the plurality of processors the source data or destination data pertain.
REFERENCES:
patent: 3787891 (1974-01-01), Moore et al.
patent: 4750109 (1988-06-01), Kita
Kadosawa Tsuneaki
Koga Eiji
Nakamura Takashi
Ozawa Kunitaka
Watanabe Hitoshi
Canon Kabushiki Kaisha
Richardson Robert L.
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