Interposer, semiconductor chip mounted sub-board, and...

Details Interposer, semiconductor chip mounted sub-board, and... Interposer, semiconductor chip mounted sub-board, and...

2008-09-02

2008-09-02

Clark, S. V (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257S786000

Reexamination Certificate

active

11456913

ABSTRACT:
A semiconductor device can be manufactured with a high non-defect ratio, making it possible to easily guarantee the KGD (Known-Good-Die) of semiconductor chips, when configuring one packaged semiconductor device on which a plurality of semiconductor chips is mounted. Utilizing each semiconductor chip is made possible without limits on terminal position, pitch, signal arrangement, and so on. Protrusions provided to a semiconductor chip mounted sealing sub-board are attached to a package substrate. A plurality of semiconductor bare chips is disposed in a space formed between the semiconductor chip mounted sealing sub-board and the package substrate, making wiring possible.

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“Part One: If a Chip Can Not be Used, There is a Package”, Nikkei Electronics, Feb. 11, 2002, pp. 108-113, No. 815, Nikkei Business Publications, Inc., Chiyoda-ku, Tokyo, Japan. (Cited on p. 1, line 22 of the specification).

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