Interposer chip, method of manufacturing the interposer...

Details Interposer chip, method of manufacturing the interposer... Interposer chip, method of manufacturing the interposer...

2008-07-08

2010-02-23

Clark, S. V (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S786000

Reexamination Certificate

active

07667331

ABSTRACT:
An interposer chip in accordance includes an insulating layer, conductive patterns and a dummy pattern. The conductive patterns are formed on the insulating layer. The dummy pattern is formed on the insulating layer to suppress a bending of the insulating layer. Further, the dummy pattern can have first isolating grooves formed along peripherals of the conductive patterns to isolate the dummy pattern from the conductive patterns. Thus, the interposer chip is not vulnerable to being bent. Further, an electrical short between the conductive patterns through the dummy pattern caused by particles is substantially avoided.

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patent: 10-0648040 (2006-11-01), None

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