Interpolator testing system

Details Interpolator testing system Interpolator testing system

2006-05-09

2006-05-09

Tsai, Carol S. W. (Department: 2857)

Data processing: measuring, calibrating, or testing

Testing system

Signal generation or waveform shaping

C713S400000, C375S316000

Reexamination Certificate

active

07043392

ABSTRACT:
According to some embodiments, a device includes an interpolator to receive at least a first clock signal having a first clock phase and to receive a second clock signal having a second clock phase. The interpolator may include a first plurality of interpolator legs associated with the first clock signal, a second plurality of interpolator legs associated with the second clock signal, and an output node to provide an output clock signal having an output clock phase based on the first clock signal, the second clock signal, and on a number of the first plurality and the second plurality of interpolator legs that are activated. The device may also include an interpolator control to activate only one of the first plurality and the second plurality of interpolator legs.

REFERENCES:
patent: 6247138 (2001-06-01), Tamura et al.
patent: 6340909 (2002-01-01), Zerbe et al.
patent: 6484268 (2002-11-01), Tamura et al.
patent: 2001/0007136 (2001-07-01), Tamura et al.
patent: 2002/0113637 (2002-08-01), Huang et al.
patent: 2003/0002596 (2003-01-01), Dunning et al.
patent: 2003/0042957 (2003-03-01), Tamura
patent: 2003/0043926 (2003-03-01), Terashima et al.
patent: 2004/0052323 (2004-03-01), Zhang
patent: 2004/0062332 (2004-04-01), Dabral et al.
patent: 2004/0088594 (2004-05-01), Canagasaby et al.

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