Interpolation looping of audio samples in cache connected to sys

Details Interpolation looping of audio samples in cache connected to sys Interpolation looping of audio samples in cache connected to sys

1997-11-15

2000-10-24

Yoo, Do Hyun

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711123, 711126, 711151, 711158, G10H 710

Patent

active

061382078

ABSTRACT:
A cache memory is updated with audio samples in a manner which minimizes system bus bandwidth and cache size requirements. The end of a loop is used to truncate a normal cache request to exactly what is needed. A channel with a loopEnd in a request will be given higher priority in a two-stage priority scheme. The requested data is conformed by trimming to the minimum data block size of the bus, such a doubleword for a PCI bus. The audio data written into the cache can be shifted on a byte-wise basis, and unneeded bytes can be blocked and not written. Request data for which a bus request has been issued can be preempted by request data attaining a higher priority before a bus grant is received.

REFERENCES:
patent: 5111727 (1992-05-01), Rossum
patent: 5342990 (1994-08-01), Rossum
patent: 5698803 (1997-12-01), Rossum
patent: 5748921 (1998-05-01), Lambrecht et al.
patent: 5918302 (1999-06-01), Rinn
patent: 5925841 (1999-07-01), Rossum
Declaration of David P. Rossum describing the G-chip 2.0, 1994.

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