Internal write/read pulse generating circuit of a...

Details Internal write/read pulse generating circuit of a... Internal write/read pulse generating circuit of a...

2011-08-02

2011-08-02

Yoha, Connie C (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S194000, C365S210100, C365S185250

Reexamination Certificate

active

07990801

ABSTRACT:
A control clock generating unit outputs a clock as a control clock when a column address strobe pulse is input and fixes the control clock to a specific level when an all bank precharge signal or a refresh signal is enabled. An internal pulse generating unit outputs an external write pulse or an external read pulse as an internal write pulse or an internal read pulse in response to the control clock.

REFERENCES:
patent: 6275437 (2001-08-01), Kim et al.
patent: 6556482 (2003-04-01), Shimoyama et al.
patent: 7609565 (2009-10-01), Lee
patent: 2008/0165610 (2008-07-01), Kim et al.
patent: 2008/0298142 (2008-12-01), Chen et al.
patent: 1020060009578 (2006-02-01), None
patent: 1020060087009 (2006-08-01), None

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