Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2006-02-21
2006-02-21
Mai, Son (Department: 2827)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S226000
Reexamination Certificate
active
07002854
ABSTRACT:
There are provided a voltage level control circuit with a reduced power consumption and a method of controlling the same. When a signal “A” is in a “L” level and a signal PL entered from the outside of the voltage level control circuit becomes “H” level, a latch signal La outputted from a latch becomes “H” level, whereby NFETs turn ON. A voltage dividing circuit comprising resistances and current mirror differential amplifiers are placed in active states to output “H” as a signal A which controls a boost voltage Vbt (word line driving voltage). As the boost voltage Vbt is increased and reaches to a reference voltage Vref2, a voltage V2 becomes “H”, whereby the signal A becomes “L”. After the signal A become “L”, the latch is made through. At this time, the signal PL is “L”, the latch signal La outputted from the latch becomes “L”, whereby the NFETs turn OFF. As described here, the NFETs is kept OFF in the other time period than when needed, in order to reduce the power consumption.
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Nakagawa Atsushi
Takahashi Hiroyuki
Choate Hall & Stewart LLP
Mai Son
NEC Electronics Corp.
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