Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2000-11-22
2002-04-30
Zweizig, Jeffrey (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
Reexamination Certificate
active
06380799
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an integrated circuit device, and more particularly, to integrated circuit devices having internal voltage generation circuits therein.
BACKGROUND OF THE INVENTION
As the integration density of integrated circuits continues to increase, the size of some elements present in those circuits, such as transistors, may decrease. However, as the size of some of the transistors present in those integrated circuits decreases, new methods for ensuring the stability of those integrated circuits may become necessary. For example, when the same external supply voltage is applied to both large and small transistors present in an integrated circuit memory device, electric fields within the integrated circuit memory device may cause smaller transistors to either malfunction or breakdown. This phenomenon may be prevented by decreasing an external supply voltage that is used to operate the memory device. To decrease the external supply voltage an internal voltage generation circuit may be used. Integrated circuit memory devices including these internal voltage generation circuits may exhibit improved stability while consuming less power in comparison to integrated circuit memory devices that use only an external supply voltage to control supply voltage.
FIG. 1
is a diagram showing a conventional internal voltage generation circuit. The internal voltage generation circuit includes a differential amplifier
10
and a driver
20
. The differential amplifier
10
compares a reference voltage VREF with an internal supply voltage VINT, and generates an output voltage VA depending on the result of the comparison. The reference voltage VREF has a fixed voltage level with respect to an external supply voltage VCC. The driver
20
generates the internal supply voltage VINT in response to the output voltage VA of the differential amplifier
10
.
During the operation of the internal voltage generation circuit, the internal supply voltage VINT is preferably set to have the same voltage level as the reference voltage VREF. When the internal supply voltage VINT is reduced to a level below the reference voltage VREF, the output voltage VA of the differential amplifier
10
is also lowered and the transistor MP
2
of the driver
20
is turned on to a greater extent. Turning on MP
2
to a greater extent operates to pull-up the internal supply voltage VINT signal line until the internal supply voltage VINT is equal to the reference voltage VREF. When the internal supply voltage VINT is equal to the reference voltage, the differential amplifier
10
achieves a quiescent operating point.
Transistors MNO and MN
1
preferably operate in a saturation region during operation of the differential amplifier
10
. In other words, when the voltage level of the internal supply voltage VINT drops, for example, due to a load on the internal supply voltage VINT, the differential amplifier
10
restores the voltage level of the internal supply voltage VINT to the original voltage level, which is preferably equal to the reference voltage VREF.
However if VCC, VREF, and VINT are reduced in order to reduce power consumption, then the voltage VDS of the transistors MN
0
and MN
1
becomes smaller. This may cause the transistors MN
0
and MN
1
, which are set to operate in a saturation region S
1
, to begin to operate in a linear region L
1
. As shown in the I
DS
vs. V
DS
curves of
FIG. 2
, when the voltage VDS of the transistors MN
0
and MN
1
becomes smaller, the operating points of the transistors MN
0
and MN
1
shift from the saturation region S
1
into a linear region L
1
of operation. The gain of the transistors MN
0
and MN
1
in the saturation region can be expressed as:
g
m
=
∂
I
DS
∂
V
GS
(
1
)
Assuming that the gain of MN
0
, MN
1
in the saturation region S
1
is expressed as g
mS1
, and that the gain in the linear region L
1
is expressed as g
mL1
, then the g
mS1
>g
mL1
due to current I
DS
decreasing as the operating points of the transistors MN
0
and MN
1
shift to the linear region. However, the VDS may remain constant. Since the gain in the linear region is smaller, the differential amplifier
10
may not be capable of accurately adjusting VINT to match VREF during normal operating modes when the driver
20
is supplying current to the VINT signal line.
Accordingly, there is a need for internal voltage generation circuits that can generate a stable internal supply voltage at low external supply voltage without loss of gain in the differential amplifier stage of the internal voltage generation circuit.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides internal voltage generation circuits which can steadily generate an internal supply voltage even if an external supply voltage decreases. A level shifter is connected to an internal supply voltage terminal. The level shifter lowers the internal supply voltage to a predetermined voltage level. A differential amplifier compares an output voltage of the internal voltage generation circuit to an output voltage of the level shifter and amplifies the difference between the two output voltages. A driver generates an internal supply voltage in response to an amplifier output of the differential amplifier. The internal voltage generation circuit preferably includes a second level shifter, which is connected to a reference voltage terminal. The second level shifter preferably lowers a reference voltage to a predetermined voltage level. In this case, the output voltage of the internal voltage generation circuit is an output voltage of the second level shifter. The differential amplifier may then compare the output voltage of the second level shifter to the output voltage of the first level shifter and amplify the difference between the two output voltages.
The first and second level shifters preferably comprise source followers and can decrease the internal supply voltage and the reference voltage, respectively, by a threshold voltage. More specifically, the first level shifter preferably includes a first transistor, in which an internal supply voltage is applied to the gate. The external supply voltage can be applied to the drain, and the source can be connected to the differential amplifier. A first current source may also be included, which is connected to the source of the first second transistor and ground. The second level shifter can include a second transistor in which the reference voltage can be applied to the gate. The external supply voltage may be applied to the drain, and the source can be connected to the differential amplifier. A second current source may be connected to the source of the second transistor and ground.
Internal voltage generation circuits according to the present invention may also include a current source controller for maintaining a constant current flowing in the current sources. The current source controller preferably includes a voltage bias unit for setting a predetermined voltage level, and a current mirror to which the external supply voltage can be applied. The current mirror determines the current volume of the current source based on the voltage level of the voltage bias unit.
According to other embodiments of the present invention internal voltage generators are provided that include a differential amplifier, a driver circuit, and a first level shifter circuit. The differential amplifier has first and second inputs. The driver circuit has an input electrically coupled to a first output of the differential amplifier, and an output electrically coupled to an internal voltage signal line. For example, the driver circuit can comprise a PMOS transistor having a gate electrode electrically connected to the first output of the differential amplifier and a drain electrically connected to the internal voltage signal line. The first level shifter circuit has an input electrically coupled to the internal voltage signal line, and an output electrically coupled to the first input of the differential amplifier. These internal voltage generators m
Chung Dae-hyun
Lee Jung-bae
Myers Bigel & Sibley & Sajovec
Samsung Electronics Co,. Ltd.
Zweizig Jeffrey
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