Internal power voltage generating circuit in semiconductor...

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Reexamination Certificate

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C365S189090, C365S233100

Reexamination Certificate

active

07613063

ABSTRACT:
A method and circuit are disclosed for generating an internal power voltage in a semiconductor memory device. The method includes receiving an external power voltage in an internal power voltage generating circuit and activating a power-up signal during a first period in the applied external power voltage rising to a desired level, powering-up the internal power voltage in relation to the external power voltage during the first period, and continuing the power-up of the internal power voltage during a second period following the first period, the second period extending beyond the deactivation of the power-up signal until receipt of an active command signal.

REFERENCES:
patent: 6097659 (2000-08-01), Kang
patent: 6492850 (2002-12-01), Kato et al.
patent: 6522193 (2003-02-01), Shin
patent: 6784704 (2004-08-01), Sato
patent: 6795366 (2004-09-01), Lee
patent: 6937074 (2005-08-01), Shin
patent: 6996023 (2006-02-01), Kim
patent: 2004/0042319 (2004-03-01), Lee

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