Intermetal dielectric layer formation with low dielectric consta

Details Intermetal dielectric layer formation with low dielectric consta Intermetal dielectric layer formation with low dielectric consta

1997-10-28

2000-08-08

Nelms, David

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

438778, 257522, 257750, 257758, H01L 2131

Patent

active

061002054

ABSTRACT:
A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the deposition of dielectric layers using high density plasma chemical vapor deposition (HDPCVD). A first HDPCVD step is carried out to form a first dielectric layer over the wiring lines and into the gaps between wiring lines. A PECVD step is carried out to deposit dielectric material over the first dielectric layer and within and to define a opening in the gap. A second HDPCVD step is carried out and the opening defined by the PECVD step is capped by a third dielectric layer. The method allows air-filled voids to be formed between adjacent metal wiring lines in a highly controlled manner which allows selection of the shape of the voids and precise location of the top of the voids. In addition, the voids are sealed by a denser and more durable material than is typical.

REFERENCES:
patent: 5510645 (1996-04-01), Fitch et al.
patent: 5731241 (1998-03-01), Jang et al.
patent: 5814555 (1998-09-01), Bandyopadhyay et al.
patent: 5880030 (1999-03-01), Fang et al.
J.T. Pye, et al., "High-Density Plasma CVD and CMP for 0.25-.mu.m Intermetal Dielectric Processing," Solid State Technology, Dec. 1995, pp. 65-69.

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