Interlocked bonding pad structures and methods of...

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type

Reexamination Certificate

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Details

C361S813000

Reexamination Certificate

active

06255586

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to microelectronic devices and methods of fabrication therefore, and more particularly, to bonding pad structures for microelectronic devices and methods of fabrication therefore.
BACKGROUND OF THE INVENTION
Bonding pads (often referred to as “bondpads”) in microelectronic devices such as integrated circuits are commonly used during electric die sort (EDS) tests and other testing and fabrication processes. A typical bonding pad includes a plurality of metal wiring layers, connected to each other by a contact plug. The bonding pad typically has relatively low conductivity because the contact plug that connects the metal wiring layers is typically made of tungsten.
When a probe tip is connected to a bonding pad during a process such as EDS, physical force may be applied to the bonding pad to the point that damage to the bonding pad structure may occur. Similarly, wire bonding processes may apply sufficient force to the bonding pad such that the structure of the bonding pad is damaged. For example, a phenomenon called chip out under bondpad (COUB) may occur, wherein a lower portion of the bonding pad is broken. The occurrence of COUB can be determined by performing a bond pull test (BPT), wherein a wire bonded to the bonding pad is pulled upward by a predetermined force that is small enough such that an undamaged bonding pad will not pull free, but large enough such that a damaged bond pad will break free at its lower portions.
A device having a COUB defect can have several problems. First, a wire connected to a bonding pad suffering from COUB may be easily detached. Second, current may leak at the area where COUB occurs, potentially deteriorating electrical characteristics of the device. Third, the overall durability of the device may be reduced, which in turn may reduce the reliability of electronic equipment in which the device is used.
SUMMARY OF THE INVENTION
In light of the foregoing, it is an object of the present invention to provide bonding pads and methods of fabrication therefore which are less vulnerable to COUB.
It is another object of the present invention to provide bonding pads and methods of fabrication therefore that can be used for connection to multiple conductive layers.
These and other objects, features and advantages may be provided according to the present invention by bonding pads which include one or more conductive fingers that extend from a pad region through one or more insulation layers to contact one or more conductive layers on a substrate. According to one aspect of the present invention, a plurality of conductive fingers extend through the insulation layer from a pad region, and are interspersed among a plurality of conductive vias extending between the pad region and the conductive layer. According to another aspect of the present invention, a bonding pad finger includes a flared portion that increases in cross-sectional area in a direction towards the substrate, interlocking the finger with the layer structure. In one embodiment of the invention, the fingers have a convex sidewall surface that mates with a complementary concave surface of an opening in an insulation layer through which the conductive finger extends. In yet another embodiment of the present invention, a bonding pad finger has a slanted surface that mates with a complementary slanted surface in an opening in a layer through which the conductive finger extends. The use of an interlocking structure can provide increased structural strength and render the bonding pad less vulnerable to detachment from underlying structures.
According to one embodiment of the present invention, a bonding pad structure includes a first conductive layer. A first insulation layer is disposed on the first conductive layer. A conductive region is disposed on the first insulation layer, the conductive region including a conductive pad region and a plurality of conductive fingers extending from the conductive pad region through respective openings in the first insulation layer and the first conductive layer. The conductive fingers contact the first conductive layer along respective sidewall surfaces of the respective openings in the first conductive layer. A plurality of conductive vias may extend between the first conductive layer and the conductive pad region, interspersed amongst the plurality of conductive fingers.
A second insulation layer may underlie the first conductive layer, disposed on a second conductive layer that underlies the second insulation layer. Respective ones of the plurality of conductive fingers may extend through respective openings in the first insulation layer, the first conductive layer and the second insulation layer to contact the second conductive layer. A plurality of conductive vias may extend between the first conductive layer and the second conductive layer, interspersed among the plurality of conductive fingers.
According to another embodiment of the present invention, the conductive region includes a third conductive layer on the first insulation layer, substantially conforming to sidewall surfaces of the openings in the first and second insulation layers, defining a plurality of volumes extending through the first insulation layer, the first conductive layer, and the second insulation layer, and contacting the second conductive layer through the openings in the first and second insulation layers. Respective ones of a plurality of conductive regions fill respective ones of the volumes. A fourth conductive layer is disposed on the third conductive layer, contacting the plurality of conductive regions.
According to another aspect of the present invention, a microelectronic device includes a substrate and a conductive layer on the substrate. An insulation layer is disposed on the conductive layer, the insulation layer having a first side, an opposite second side contacting the conductive layer, and an opening passing from the first side to the second side including a flared portion that increases in cross-sectional area in a direction away from the first side. A conductive finger is interlocked with the insulation layer, the conductive finger extending from the first side of the insulation layer to the conductive layer and substantially conforming to the flared portion of the opening. In one embodiment of the present invention, the opening in the insulation layer has a concave sidewall surface, and the interlocked conductive finger has a complementary convex sidewall surface contacting the concave sidewall surface of the opening. In another embodiment of the present invention, the opening in the insulation layer has a slanted sidewall surface. The conductive finger has a complementary slanted sidewall surface mating with the slanted sidewall surface of the opening in the insulation layer.
According to another aspect of the present invention, a bonding pad for contacting a conductive layer underlying an insulation layer on a microelectronic substrate includes a conductive finger extending through an opening in the insulation layer to contact the underlying conductive layer, the conductive finger having a flared portion that increases in cross-sectional area in a direction towards the substrate and that mates with a flared sidewall surface of the opening in the insulation layer. The bonding pad may further include a conductive pad portion on the insulation layer, wherein the conductive finger extends from the conductive pad portion through the insulation layer to conduct the underlying conductive layer. According to one embodiment of the present invention, the conductive finger has a convex sidewall surface that mates with a concave sidewall surface of the opening in the insulation layer. According to another embodiment of the present invention, the conductive finger has a slanted sidewall surface that mates with a slanted sidewall surface of the opening in the insulation layer.
According to method aspects of the present invention, a bonding pad structure is formed by forming a first conductive layer on a substrate and for

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