Interlevel dielectric with air gaps to reduce permitivity

Details Interlevel dielectric with air gaps to reduce permitivity Interlevel dielectric with air gaps to reduce permitivity

1996-06-05

1998-08-11

Everhart, Caridad

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438700, 438723, H01L 2131

Patent

active

057927065

ABSTRACT:
A reduced permittivity interlevel dielectric is provided. The interlevel dielectric is formed between two levels of interconnect. The interlevel dielectric comprises a first dielectric layer formed from a TEOS source deposited on a first level interconnect. The first dielectric contains air gaps at spaced intervals across the first dielectric. A second dielectric, preferably from a silane source is deposited upon said first dielectric. A second interconnect level is then placed on the second dielectric.

REFERENCES:
patent: 5407860 (1995-04-01), Stoltz et al.
patent: 5559055 (1996-09-01), Chang et al.
S. Wolf, "Silicon Processing for the VLSI Era" vol. 2 (1990) Lattice Press, Calif. p. 198.

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